1. Field of the Invention
This invention relates to through silicon via techniques, and, more particularly, to a through-holed interposer, a packaging substrate, and methods of fabricating the same.
2. Description of Related Art
With the rapid development of the electronic industry, electronic products are produced to be light-weighted and low-profiled and have various functionalities. FIG. 1 is a cross-sectional view of a flip-chip package structure 1 according to the prior art.
As shown in FIG. 1, the package structure 1 comprises a packaging substrate 10 having a first surface 10a and a second surface 10b. Flip-chip soldering pads 100 are disposed on the first surface 10a of the packaging substrate 1 and electrically connected to electrode pads 120 of a semiconductor chip 12 through solder bumps 11. An underfill 13 is formed between the first surface 10a of the packaging substrate 10 and the semiconductor chip 12 and encapsulates the solder bumps 11. Ball implanting pads 101 are disposed on the second surface 10b of the packaging substrate 10, and are electrically connected through solder balls 14 to another electronic device (not shown) such as a printed circuit board.
As the semiconductor chip 12 is developed to have a critical dimension less than 45 nm, an extreme low-k dielectric (ELK) or ultra low-K (ULK) dielectric material is employed in a back-end of line (BEOL). However, the low-k dielectric material is porous and fragile. As a result, the semiconductor chip 12 is easily cracked due to too great the difference between the thermal expansion coefficients (CTE) of the packaging substrate 10 and the semiconductor chip 12.
With the demands of lighter, smaller electronic products, the semiconductor chip 12 is required to have a high layout density in nano-meter scale, and pitches among electrode pads 120 also become smaller and smaller. However, the pitches of the flip-chip soldering pads 100 of the packaging substrate 10 is in micro-meters. Although the semiconductor chip 12 having a high density layout has come to the market, no packaging substrate is available to cooperate with the semiconductor chip 12.
Therefore, how to overcome the problems of the prior art is becoming one of the most popular issues in the art.